A 6-GHz integrated phase-locked loop using AlGaAs/GaAs heterojunction bipolar transistors
A fully integrated 6-GHz phase-locked-loop (PLL) fabricated using AlGaAs/GaAs heterojunction bipolar transistors (HBTs) is described. The PLL is intended for use in multigigabit-per-second clock recovery circuits for fiber-optic communication systems. The PLL circuit consists of a frequency quadrupl...
Saved in:
Published in: | IEEE journal of solid-state circuits Vol. 27; no. 12; pp. 1752 - 1762 |
---|---|
Main Authors: | , , , |
Format: | Journal Article |
Language: | English |
Published: |
IEEE
01-12-1992
|
Subjects: | |
Online Access: | Get full text |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Summary: | A fully integrated 6-GHz phase-locked-loop (PLL) fabricated using AlGaAs/GaAs heterojunction bipolar transistors (HBTs) is described. The PLL is intended for use in multigigabit-per-second clock recovery circuits for fiber-optic communication systems. The PLL circuit consists of a frequency quadrupling ring voltage-controlled oscillator (VCO), a balanced phase detector, and a lag-lead loop filter. The closed-loop bandwidth is approximately 150 MHz. The tracking range was measured to be greater than 750 MHz at zero steady-state phase error. The nonaided acquisition range is approximately 300 MHz. This circuit is the first monolithic HBT PLL and is the fastest yet reported using a digital output VCO. The minimum emitter area was 3 mu m*10 mu m with f/sub t/=22 GHz and f/sub max/=30 GHz for a bias current of 2 mA. The speed of the PLL can be doubled by using 1- mu m*10- mu m emitters in next-generation circuits. The chip occupies a die area of 2-mm*3-mm and dissipates 800 mW with a supply voltage of -8 V.< > |
---|---|
Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.173102 |