Challenges in the implementation of low-k dielectrics in the back-end of line

The introduction of ultra low-k materials in copper technology has been much slower than anticipated in the ITRS Roadmap. The introduction of porosity in low-k materials has increased the level of complexity tremendously. In this paper, the challenges appearing during the integration of ultra low-k...

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Bibliographic Details
Published in:Microelectronic engineering Vol. 80; pp. 337 - 344
Main Authors: Hoofman, R.J.O.M., Verheijden, G.J.A.M., Michelon, J., Iacopi, F., Travaly, Y., Baklanov, M.R., Tökei, Zs, Beyer, G.P.
Format: Journal Article Conference Proceeding
Language:English
Published: Amsterdam Elsevier B.V 01-06-2005
Elsevier Science
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Summary:The introduction of ultra low-k materials in copper technology has been much slower than anticipated in the ITRS Roadmap. The introduction of porosity in low-k materials has increased the level of complexity tremendously. In this paper, the challenges appearing during the integration of ultra low-k dielectrics will be discussed, since a proper understanding of these issues is essential for downscaling of the interconnect system. The inferior mechanical and thermal properties were always identified as main showstoppers for low-k integration. However, the extreme vulnerability of porous low-k to produces-induced damage (accompanied with the loss of dielectric performance and reliability) demands a continuous innovation of materials, processes and integration approaches.
Bibliography:ObjectType-Article-2
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content type line 23
ISSN:0167-9317
1873-5568
DOI:10.1016/j.mee.2005.04.088