An experimental coin-sized radio for extremely low-power WPAN (IEEE 802.15.4) application at 2.4 GHz

An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization...

Full description

Saved in:
Bibliographic Details
Published in:IEEE journal of solid-state circuits Vol. 38; no. 12; pp. 2258 - 2268
Main Authors: Choi, Pilsoon, Park, Hyung Chul, Kim, Sohyeong, Park, Sungchung, Nam, Ilku, Kim, Tae Wook, Park, Seokjong, Shin, Sangho, Kim, Myeung Su, Kang, Kyucheol, Ku, Yeonwoo, Choi, Hyokjae, Park, Sook Min, Lee, Kwyro
Format: Journal Article
Language:English
Published: New York IEEE 01-12-2003
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:An experimental 2.4-GHz CMOS radio composed of RF and digital circuits for the low-power and low-rate preliminary IEEE802.15.4 WPAN is reported, consuming 21 mW in receive mode and 30 mW in transmit mode. The RF design focus is to maximize linearity for a given power consumption using linearization methods which lead an order of magnitude improvement in LNA/mixer IIP3/power performance. Chip-on-PCB technology allows implementation of a coin-sized radio at very low cost, which also provides 3 dBi gain patch antenna and high Q (>50) inductors.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.2003.819083