ITER fast plant system controller prototype based on ATCA platform

• Published in: Fusion engineering and design Vol. 87; no. 12; pp. 2024 - 2029
• Main Authors: Gonçalves, B., Sousa, J., Carvalho, B.B., Batista, .A., Neto, A., Santos, B., Duarte, A., Valcárcel, D., Alves, D., Correia, M., Rodrigues, A.P., Carvalho, P.F., Ruiz, M., Vega, J., Castro, R., López, J.M., Utzel, N., Makijarvi, P.
• Format: Journal Article
• Language: English
• Published: Elsevier B.V 01-12-2012
• Subjects: ATCA; Control system; Control systems; Data acquisition; Design engineering; Digitization; Focusing; Modules; Plasma control; Prototypes; Sampling; Data acquisition; Control system; Plasma control; ATCA
• ISSN: 0920-3796; 1873-7196
• DOI: 10.1016/j.fusengdes.2012.04.005

The ITER fast plan system controllers (FPSC) are based on embedded technologies. The FPSCs [1] will be devoted to data acquisition tasks (sampling rates>1kSPS) and control purposes in closed-control loops whose cycle times are below 1ms. Fast controllers will be dedicated industrial controllers with the ability to supervise other fast and/or slow controllers and interface to actuators, sensors and high performance networks. This contribution presents an FPSC prototype, specialized for data acquisition, based on the ATCA (Advanced Telecommunications Computing Architecture) standard. This prototyping activity contributes to the ITER Plant Control Design Handbook (PCDH) effort of standardization, specifically regarding fast controller characteristics.
For the prototype, IPFN has developed a new family of ATCA modules targeting ITER requirements. This family of modules comprises an AMC (Advanced Mezzanine Card) carrier/data hub/timing hub, compliant with the upcoming ATCA extensions for Physics, and a multi-channel galvanically isolated PnP digitizer, designed for serviceability. The design and test of a peer-to-peer communications layer for the implementation of a reflective memory over PCI Express and the design and test of an IEEE-1588 transport layer over an high performance serial link were also performed. In this contribution, a complete description of the solution is presented as well as the integration of the controller into the standard CODAC environment. The most relevant test results will be addressed, focusing in the benefits and limitations of the applied technologies.