Compensating Processing Delay in Excess of One Clock Cycle in Noise Shaping Loops without Altering the Filter Topology

• Published in: IEEE access Vol. 9; p. 1
• Main Authors: Lokin, Christiaan E., Schinkel, Daniel, Van der Zee, Ronan A.R., Nauta, Bram
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 01-01-2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Clocks; Delays; excess loop delay (ELD); Hardware; loop filter; Low pass filters; Noise; Noise shaping; Poles; Poles and zeros; Shape; sigma-delta analog-to-digital converter (ADC); Stability criteria; Topology; Transfer functions
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2021.3101574

This work presents an analytical method to design a stable loop filter for a noise shaper with parasitic delays or poles in the loop. This method does not require an increase in the order of the loop or extra feedback paths and keeps the original poles and zeros of the noise-transfer function at the same location. The method has been applied to a low-pass loop filter with a parasitic unit delay and a band-pass loop filter with either three unit delays or a high-frequency pole, obtaining stable loop filters in all three cases.