High speed serial transceivers for data communication systems

High speed serial transceivers for data communication systems

The architecture and critical circuit design issues for high-speed serial data links operating in excess of 1 Gb/s are described. Trade-offs in power vs. performance are presented for SONET/SDH transceivers and backplane transceivers for Infiniband or similar standards.

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Bibliographic Details
Published in:IEEE communications magazine Vol. 39; no. 7; pp. 160 - 165
Main Authors: Khoury, J.M., Lakshmikumar, K.R.
Format: Magazine Article
Language:English
Published: New York IEEE 01-07-2001
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:
Backplanes
Circuit design
Circuits
Clocks
Communication systems
Data communication
Data links
High speed
Intersymbol interference
Optical signal processing
Serials
SONET
Synchronous digital hierarchy
Timing
Tradeoffs
Transceivers
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Description
Summary:The architecture and critical circuit design issues for high-speed serial data links operating in excess of 1 Gb/s are described. Trade-offs in power vs. performance are presented for SONET/SDH transceivers and backplane transceivers for Infiniband or similar standards.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0163-6804
1558-1896
DOI:10.1109/35.933452