Peak power estimation of VLSI circuits: new peak power measures

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 8; no. 4; pp. 435 - 439
• Main Authors: Hsiao, M.S., Rudnick, E.M., Patel, J.H.
• Format: Journal Article
• Language: English
• Published: Piscataway, NJ IEEE 01-08-2000; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Circuit properties; Circuits; Combinational circuits; Delay; Delay estimation; Digital circuits; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Energy consumption; Estimates; Exact sciences and technology; Integrated circuits; Mathematical analysis; Power consumption; Power dissipation; Power generation; Power measurement; Pulse and digital circuits; Sequential circuits; Switches; Switching circuits; Vectors (mathematics); Very large scale integration; Lower bound; Energy consumption; VLSI circuit; Power circuit; Worst case method; Experimental study; Modeling; Sequential circuit; Random sequence; Energy dissipation; Automatic generation; Measurement method; Peak power; Execution time
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/92.863624

New measures of peak power are proposed in the context of sequential circuits, and an efficient automatic procedure is presented to obtain very good lower bounds on these measures, as well as providing the actual input vectors that attain such bounds. Automatic generation of a functional vector loop for near-worst case power consumption is also attained. Experiments show that vector sequences generated give much more accurate estimates of peak power dissipation and are generated in significantly shorter execution times than estimates made from randomly generated sequences for four delay models.