Fast Location of Opens in TSV-Based 3-D Chip Using Simple Resistor Chain
This brief proposes an electrical method using simple resistor chain in parallel to quickly locate open circuits in a 3-D chip. This method is theoretically analyzed using the equivalent circuit, and experimentally validated by a 3-D integrated circuit (3-D IC). The fabricated 3-D IC consists of one...
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Published in: | IEEE transactions on electron devices Vol. 61; no. 7; pp. 2584 - 2587 |
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Main Authors: | , , , , , , , , , |
Format: | Journal Article |
Language: | English |
Published: |
New York
IEEE
01-07-2014
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects: | |
Online Access: | Get full text |
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Summary: | This brief proposes an electrical method using simple resistor chain in parallel to quickly locate open circuits in a 3-D chip. This method is theoretically analyzed using the equivalent circuit, and experimentally validated by a 3-D integrated circuit (3-D IC). The fabricated 3-D IC consists of one printed circuit board, one organic substrate, and seven 65-nm CMOS dies stacked using microbumps and through-silicon vias. Results show that, the proposed parallel resistor chain can efficiently locate opens in a complicated 3-D IC within several minutes, using the resistance measured by power supply or multimeter only. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2014.2321453 |