Measurements of Matching and High Count Rate Performance of Multichannel ASIC for Digital X-Ray Imaging Systems

• Published in: IEEE transactions on nuclear science Vol. 54; no. 4; pp. 1207 - 1215
• Main Authors: Grybos, P.., Maj, P.., Ramello, L.., Swientek, K..
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-08-2007; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Application specific integrated circuits; Capacitance; Channels; Charge; Charge sensitive amplifier; Circuit noise; CMOS process; count rate; Counting; Counting circuits; Detectors; Discriminators; matching; Position measurement; Position sensitive particle detectors; Semiconductor device noise; Semiconductors; Shapers; Strips; X-ray imaging
• ISSN: 0018-9499; 1558-1578
• DOI: 10.1109/TNS.2007.903176

We present the measurements of matching and high count rate performance of a 64 channel readout ASIC called DEDIX for high count rate position-sensitive measurements using semiconductor detectors. The ASIC is designed in 0.35 mum CMOS process and its total area is 3900 times 5000 mum 2 . The DEDIX has a binary readout architecture. Each channel is built of a charge sensitive amplifier (CSA) with a pole-zero cancellation circuit, a shaper, two independent discriminators and two independent 20-bit counters. The size of the input device in CSA has been optimized for a detector capacitance in the range of 1-3 pF per strip. An equivalent noise charge of 110 el rms has been achieved for a total detector capacitance of 1 pF at the shaper peaking time of 160 ns. Internal correction DAC implemented in each channel independently ensures a low spread of discriminator effective threshold, namely 0.4 mV at one sigma level. The mean gain in the multichannel ASIC is 54 muV/el, with a good uniformity from channel-to-channel (sd/mean ap 0.8%). Low noise performance and high rate capability have been demonstrated by the measurement up to and above 1 MHz average rate of input signals.