Impact of passivation layers on enhanced low-dose-rate sensitivity and pre-irradiation elevated-temperature stress effects in bipolar linear ICs

• Published in: IEEE transactions on nuclear science Vol. 49; no. 6; pp. 3171 - 3179
• Main Authors: Shaneyfelt, M.R., Pease, R.L., Schwank, J.R., Maher, M.C., Hash, G.L., Fleetwood, D.M., Dodd, P.E., Reber, C.A., Witczak, S.C., Riewe, L.C., Hjalmarson, H.P., Banks, J.C., Doyle, B.L., Knapp, J.A.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-12-2002; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Bipolar integrated circuits; Chips; Circuit design; Circuit testing; CMOS technology; Devices; Electronic equipment testing; Guidelines; Hardness; Integrated circuit reliability; Laboratories; Oxides; Passivation; Pets; Positron emission tomography; Stresses; Thermal stresses
• ISSN: 0018-9499; 1558-1578
• DOI: 10.1109/TNS.2002.805365

Final chip passivation layers are shown to have a major impact on the total dose hardness of bipolar linear technologies. It is found that devices fabricated without passivation layers do not exhibit enhanced low-dose-rate sensitivity (ELDRS) or pre-irradiation elevated-temperature stress (PETS) sensitivity, whereas devices from the same production lot fabricated with either oxide/nitride or doped-glass passivation layers are ELDRS and PETS sensitive. In addition, removing the passivation layers after fabrication can mitigate ELDRS and PETS effects. ELDRS and PETS effects do not appear to be inherently related to circuit design or layout, but are related to mechanical stress effects, hydrogen in the device, or a combination of the two. These results suggest that proper engineering of the final chip passivation layer might eliminate ELDRS and PETS effects in bipolar integrated circuits.