Stacked CMOS SRAM cell

A static random access memory (SRAM) cell with cross-coupled stacked CMOS inverters is demonstrated for the first time. In this approach, CMOS inverters are fabricated with a laser recrystallized p-channel device stacked on top of and sharing the gate with a bulk n-channel device using a modified tw...

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Bibliographic Details
Published in:	IEEE electron device letters Vol. 4; no. 8; pp. 272 - 274
Main Authors:	Chen, C.-E., Lam, H.W., Malhi, S.D.S., Pinizzotto, R.F.
Format:	Journal Article
Language:	English
Published:	New York, NY IEEE 01-08-1983 Institute of Electrical and Electronics Engineers
Subjects:	Applied sciences Circuit testing Coatings Electronics Etching Exact sciences and technology Laser modes MOS devices Power lasers Random access memory Silicon Storage and reproduction of information Thermal stresses Threshold voltage Inverting device Random access memory(RAM) Complementary MOS technology Static storage Memory
Online Access:	Get full text
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Summary:	A static random access memory (SRAM) cell with cross-coupled stacked CMOS inverters is demonstrated for the first time. In this approach, CMOS inverters are fabricated with a laser recrystallized p-channel device stacked on top of and sharing the gate with a bulk n-channel device using a modified two-polysilicon n-MOS process. The memory cell has been exercised through the write and read cycles with external signal generators while the output is buffered by an on-chip, stacked-CMOS-inverter-based amplifier.
Bibliography:	ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23
ISSN:	0741-3106 1558-0563
DOI:	10.1109/EDL.1983.25730