Implications of the Logical Decode on the Radiation Response of a Multi-Level Cell NAND Flash Memory

• Published in: IEEE transactions on nuclear science Vol. 60; no. 6; pp. 4451 - 4456
• Main Authors: Ingalls, J. David, Gadlage, Matthew J., Duncan, Adam R., Kay, Matthew J., Cole, Patrick L., Hunt, Ken K.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-12-2013; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Charge; Devices; Equivalence; Flash memories; Flash memory; Flash memory (computers); floating gate; Gates; heavy ion; Logic gates; multi-level cell (MLC); Nonvolatile memory; Organizations; Radiation effects; Semiconductor devices; single-level cell (SLC); total ionizing dose; Transistors; x-ray; X-ray scattering
• ISSN: 0018-9499; 1558-1578
• DOI: 10.1109/TNS.2013.2282699

The radiation response of a multi-level cell (MLC) NAND flash is used to determine the organization of logical states as they correspond to floating gate charge levels of constituent bit cell transistors. This "logical decode" is then used to demonstrate how an MLC device can be used to emulate a single-level cell (SLC) flash with total dose radiation sensitivity equivalent to and even surpassing that of a comparable actual SLC device. In addition, it is shown that the logical decode must be taken into account when performing radiation testing on MLC flash devices so as to gather accurate worst case response data.