Challenges Regarding Parallel Connection of SiC JFETs

• Published in: IEEE transactions on power electronics Vol. 28; no. 3; pp. 1449 - 1463
• Main Authors: Peftitsis, D., Baburske, R., Rabkowski, J., Lutz, J., Tolstoy, G., Nee, H.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-03-2013; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Breakdown voltage; Circuit properties; Circuits; Connection and protection apparatus; Electric currents; Electric power; Electric, optical and optoelectronic circuits; Electrical engineering. Electrical power engineering; Electrical equipment; Electronic circuits; Electronics; Exact sciences and technology; JFETs; Junction field-effect transistor (JFET); Logic gates; parallel-connected switches; Performance evaluation; pinch-off voltage; reverse breakdown voltage of the gate; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Signal convertors; Silicon carbide; silicon carbide (SiC); SRA - Energi; SRA - Energy; Switching; Switching loss; Switching, multiplexing, switched capacity circuits; Temperature dependence; Transistors; Static characteristic; Performance evaluation; Power converter; State of the art; Circuit layout; Junction field effect transistor; Driver; Pinch off voltage; Parallel; silicon carbide (SiC); Gating circuits; Inductance; Disruptive voltage; reverse breakdown voltage of the gate; Silicon; Selector switch; Temperature dependence; Gate voltage; Junction field-effect transistor (JFET); Transfer characteristic; Power electronics; Mismatching; Switching; High power; pinch-off voltage; parallel-connected switches; Parallel connection; Comparative study
• ISSN: 0885-8993; 1941-0107; 1941-0107
• DOI: 10.1109/TPEL.2012.2206611

State-of-the-art silicon carbide switches have current ratings that are not sufficiently high to be used in high-power converters. It is, therefore, necessary to connect several switches in parallel in order to reach sufficient current capabilities. An investigation of parallel-connected normally ON silicon carbide JFETs is presented in this paper. The device parameters that play the most important role for the parallel connection are the pinch-off voltage, the gate-source reverse breakdown voltage, the spread in the on-state resistances, and the variations in static transfer characteristics of the devices. Moreover, it is experimentally shown that a fifth factor affecting the parallel connection of the devices is the parasitic inductances of the circuit layout. The temperature dependence of the gate-source reverse breakdown voltages is analyzed for two different designs of silicon carbide JFETs. If the spread in the pinch-off and gate-source reverse breakdown voltages is sufficiently large, there might be no possibility for a stable off-state operation of a pair of transistors without forcing one of the gate voltages to exceed the breakdown voltage. A solution to this problem using individual gate circuits for the JFETs is given. The switching performance of two pairs of parallel-connected devices with different combinations of parameters is compared employing two different gate-driver configurations. Three different circuit layouts are considered and the effect of the parasitic inductances is experimentally investigated. It is found that using a single gate circuit for the two mismatched JFETs may improve the switching performance and therefore the distribution of the switching losses significantly. Based on the measured switching losses, it is also clear that regardless of the design of the gate drivers, the lowest total switching losses for the devices are obtained when they are symmetrically placed.