A fully integrated high IP1dB CMOS SPDT switch using stacked transistors for 2.4 GHz TDD transceiver applications

• Published in: Sadhana (Bangalore) Vol. 43; no. 6; pp. 1 - 7
• Main Authors: SCHMIEDEKE, PAUL, BHUIYAN, MOHAMMAD ARIF SOBHAN, REAZ, MAMUN BIN IBNE, CHANG, TAE GYU, CRESPO, MARIA LIZ, CICUTTIN, ANDRES
• Format: Journal Article
• Language: English
• Published: New Delhi Springer India 01-06-2018; Springer Nature B.V
• Subjects: CMOS; Engineering; Inductors; Insertion loss; Monte Carlo simulation; Product development; Radio frequency identification; Radio signals; Semiconductor devices; Spectrum allocation; Substrates; Time division; Transceivers; Transistors; CMOS; T/R switch; ISM band; SPDT; transceiver
• ISSN: 0256-2499; 0973-7677
• DOI: 10.1007/s12046-018-0913-z

A transmit/receive (T/R) switch is an essential module of every modern time division duplex (TDD) transceiver circuit. A T/R switch with high power handling capacity in CMOS process is difficult to design due to capacitive coupling of radio frequency signals to the substrate. This paper proposes a single-pole-double-throw (SPDT) T/R switch designed in a standard Silterra 130 nm CMOS process for high-power applications like RFID readers. The results reveal that, in 2.4 GHz ISM band, the proposed switch exhibits a very high input P1dB of 39 dBm with insertion loss of only 0.34 dB and isolation of 40 dB in transmit mode but 1.08 dB insertion loss and 30 dB isolation in receive mode. Stacked thick-oxide triple-well transistors, resistive body floating and negative control voltages are used to achieve such lucrative performance. Moreover, the chip size of the designed switch is only 0.034 mm
2
as bulky inductors and capacitors are avoided. The Monte-Carlo and corner analyses confirm that the performance of the switch is also quite stable and reliable.