Electrical Performance Optimization of Nanoscale Double-Gate MOSFETs Using Multiobjective Genetic Algorithms

• Published in: IEEE transactions on electron devices Vol. 58; no. 11; pp. 3743 - 3750
• Main Authors: Bendib, Toufik, Djeffal, Fayçal
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-11-2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Analog circuits; Applied sciences; Circuit design; Circuit properties; Computer simulation; Design. Technologies. Operation analysis. Testing; Double-gate (DG) metal-oxide-semiconductor field-effect transistor (MOSFET); Electric potential; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Genetic algorithms; Integrated circuits; Logic gates; Molecular electronics, nanoelectronics; MOSFETs; multiobjective; Nanocomposites; Nanomaterials; nanoscale; Nanoscale devices; Nanostructure; Operations research; Optimization; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Studies; subthreshold; Threshold voltage; Transistors; Analog circuit; Voltage threshold; MOSFET; nanoscale; Circuit design; Transistor gate; Optimization; Optimal design; Nanoelectronics; Nanometer scale; Complementary MOS technology; multiobjective; CMOS integrated circuits; Transconductance; DIBL effect; Electrical characteristic; Circuit simulation; Quantum effect; Dual gate transistor; Compact design; Genetic algorithm; Double-gate (DG) metal―oxide―semiconductor field-effect transistor (MOSFET); Analytical method; Digital circuit; subthreshold; Objective function
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2011.2163820

In this paper, a new multiobjective genetic algorithm (MOGA)-based approach is proposed to optimize the electrical performance of double-gate (DG) MOSFETs for nanoscale CMOS digital applications. The proposed approach combines the universal optimization and fitting capability of MOGAs and the cost-effective optimization concept of quantum correction to achieve reliable and optimized designs of DG MOSFETs for nanoelectronics analog and digital circuit simulations. The dimensional and electrical parameters of the DG MOSFET (threshold voltage rolloff, off-current, drain-induced barrier lowering, subthreshold swing ( S ), output conductance, and transconductance) have been ascertained, and a compact analytical expression, including quantum effects, has been presented. The developed compact models are used to formulate different objective functions, which are the prerequisite of the multiobjective optimization. The optimized design can also be incorporated into a circuit simulator to study and show the impact of our approach on a nanoscale CMOS-based circuit design.