The Fermi-level efficiency method and its applications on high interface trap density oxide-semiconductor interfaces

The Fermi-level efficiency method and its applications on high interface trap density oxide-semiconductor interfaces

An interface characterization technique, termed the Fermi-level efficiency (FLE) method, is proposed for evaluating the passivation level of high trap density oxide-semiconductor interfaces. Based on the characteristic charge trapping time-energy relation and the conductance method, the FLE method e...

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Bibliographic Details
Published in:Applied physics letters Vol. 94; no. 15; pp. 153508 - 153508-3
Main Authors: Lin, H. C., Brammertz, Guy, Martens, Koen, de Valicourt, Guilhem, Negre, Laurent, Wang, Wei-E, Tsai, Wilman, Meuris, Marc, Heyns, Marc
Format: Journal Article
Language:English
Published: American Institute of Physics 13-04-2009
Online Access:Get full text
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Summary:An interface characterization technique, termed the Fermi-level efficiency (FLE) method, is proposed for evaluating the passivation level of high trap density oxide-semiconductor interfaces. Based on the characteristic charge trapping time-energy relation and the conductance method, the FLE method examines the Fermi-level displacement at the oxide-semiconductor interface under applied gate bias. The obtained Fermi-level efficiencies can be used to assess the interface qualities of metal-oxide-semiconductor devices with III-V and other novel substrate materials.
ISSN:0003-6951
1077-3118
DOI:10.1063/1.3113523