Achieving Manufacturing Readiness for 6-Inch HgCdTe on Silicon

• Published in: Journal of electronic materials Vol. 39; no. 7; pp. 1007 - 1014
• Main Authors: Paden, L. A., Bangs, J. W., Emerson, R. M., Olshove, R. M., Norton, E. M., Garnett, D. A., Smith, E., Garvine, K. A., Peterson, J. M., Reddy, M.
• Format: Journal Article Conference Proceeding
• Language: English
• Published: Boston Springer US 01-07-2010; Springer; Springer Nature B.V
• Subjects: Applied sciences; Characterization and Evaluation of Materials; Chemistry and Materials Science; Electronics; Electronics and Microelectronics; Exact sciences and technology; Instrumentation; Manufacturing; Materials; Materials Science; Mercury cadmium telluride; Optical and Electronic Materials; Optimization; Optoelectronic devices; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Silicon; Solid State Physics; manufacturing readiness; production capability; silicon; MWIR; large format; HgCdTe; MRL methodology; Defect density; Material processing; Process control; In-situ processing; Photodetector; Implementation; II-VI semiconductors; Cadmium tellurides; Mercury tellurides; Silicon; Wafer
• ISSN: 0361-5235; 1543-186X
• DOI: 10.1007/s11664-010-1089-4

Six-inch HgCdTe-on-silicon wafer capability is important due to the increase in die size along with the reduction in pixel pitch. Successful manufacturing of 6-inch HgCdTe on silicon depends upon the availability of low-defect-density substrates, robust chemical processing, and
in situ
measuring techniques. Critical advances in wafer processing across 6-inch wafers have made the transition from development to production successful. The status of each of these steps is described in this paper, with emphasis on wafer uniformity and process reproducibility. Finally a short section is dedicated to implementation of statistical process control for optimal throughput and yield.