A Current-Mode Multiple-Resolution Edge-Filtering Complementary Metal Oxide Semiconductor Image Sensor Employing Self-Similitude Processing in Non-Subtraction Configuration
A non-subtraction configuration of the self-similitude image processing architecture has been developed for pixel-parallel multiple-resolution directional edge filtering. In contrast to the subtraction-separated configuration employed in our previous work, the subtraction operation has been entirely...
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| Published in: | Japanese Journal of Applied Physics Vol. 49; no. 4; pp. 04DE07 - 04DE07-9 |
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| Main Author: | |
| Format: | Journal Article |
| Language: | English |
| Published: |
The Japan Society of Applied Physics
01-04-2010
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| Online Access: | Get full text |
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| Summary: | A non-subtraction configuration of the self-similitude image processing architecture has been developed for pixel-parallel multiple-resolution directional edge filtering. In contrast to the subtraction-separated configuration employed in our previous work, the subtraction operation has been entirely eliminated from the computation repertory of processing elements in the present configuration. As a result, the hardware organization of the multiple-resolution edge-filtering complementary metal oxide semiconductor (CMOS) image sensor has been greatly simplified, and a fully pixel-parallel self-similitude processing has been established without any complexity in interconnects. In addition, it has provided an opportunity to further apply the self-similitude architecture to other filtering operation like Gaussian filtering and Laplacian filtering. An analog edge-filtering chip implemented using current-mode computation capable of performing four-directional edge filtering at full, half, and quarter resolutions was designed and fabricated in a 0.18-\mbox{$\mu$m} five-metal CMOS technology. The concept has been verified by chip measurements, which show that the four-directional edge filtering at multiple resolutions is accomplished at 910 frames/s for $56{\times}56$-input images. |
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| Bibliography: | Concept of multiple-resolution image perception using directional-edge based image feature representation. Facial images of any sizes can be detected by the combination of (1/2) n -scaling in input images and the use of three different sizes of template images, 100, 80, and 60%. Pixel organization of multiple-resolution edge-filtering CMOS image sensor (a), output signal from PD cell (b), and two operations in PE (c). Ten fundamental operations in subtraction-separated configuration (a) and two fundamental operations in non-subtraction configuration (b). Full-resolution horizontal edge filtering operation (a) and half-resolution +45\mbox{ \circ } edge filtering operation (b) in self-similitude processing. Hardware organization of multiple-resolution directional edge filtering CMOS image sensor in subtraction-separated configuration (a) and in non-subtraction configuration (b). Schematic diagram of PD cell. Block diagram of PE cell (a) and schematic diagram of current-mode analog adder in PE cell (b). Four-directional control-signal propagation circuitry (a) and example of +45\mbox{ \circ } signal propagation (b). Photomicrograph of proof-of-concept chip. The chip is composed of $56{\times}56$ photodiodes and $55{\times}55$ processing elements. Measurement results of sample-and-hold circuit (a), V/I converter (b), and plus/minus current generator (c) in PD cell. Measured results of $4:1$ current mirror circuit in PE cell. Measured waveforms from edge filtering chip (a) and illustration of experimental setup (b). Quarter-resolution +45\mbox{ \circ } edge filtering was carried out, and the filtering results obtained from PEs on one diagonal line were read out pixel-by-pixel in every 10 \mbox{$\mu$}s. Experimental results of multiple-resolution four-directional edge filtering. Noise analysis of edge filtering CMOS image sensor. Examples of line-parallel processing: full-resolution horizontal edge filtering (a) and +45\mbox{ \circ } edge filtering (b). Examples of pixel-parallel processing: full-resolution horizontal edge filtering (a) and +45\mbox{ \circ } edge filtering (b). How other kernel convolutions are realized in non-subtraction configuration is illustrated by taking half-resolution Laplacian kernel filtering as an example. |
| ISSN: | 0021-4922 1347-4065 |
| DOI: | 10.1143/JJAP.49.04DE07 |