Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance-Part II: Model Validation

In this paper, we show a validation of our compact model for negative capacitance FET (NCFET) presented in Part I. The model is thoroughly validated with the TCAD simulations with respect to ferroelectric thickness scaling and temperature effects. Interestingly, we find that an NCFET with PZT ferroe...

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Bibliographic Details
Published in:IEEE transactions on electron devices Vol. 63; no. 12; pp. 4986 - 4992
Main Authors: Pahwa, Girish, Dutta, Tapas, Agarwal, Amit, Khandelwal, Sourabh, Salahuddin, Sayeef, Hu, Chenming, Chauhan, Yogesh Singh
Format: Journal Article
Language:English
Published: New York IEEE 01-12-2016
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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