Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance-Part II: Model Validation

• Published in: IEEE transactions on electron devices Vol. 63; no. 12; pp. 4986 - 4992
• Main Authors: Pahwa, Girish, Dutta, Tapas, Agarwal, Amit, Khandelwal, Sourabh, Salahuddin, Sayeef, Hu, Chenming, Chauhan, Yogesh Singh
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-12-2016; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Capacitance; Circuits; Compact modeling; ferroelectric; Ferroelectric materials; Ferroelectricity; Field effect transistors; MOSFET; negative capacitance; negative capacitance FET (NCFET); negative differential resistance (NDR); Semiconductor device modeling; Temperature effects; Thickness; Transient analysis; transients
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2016.2614436

In this paper, we show a validation of our compact model for negative capacitance FET (NCFET) presented in Part I. The model is thoroughly validated with the TCAD simulations with respect to ferroelectric thickness scaling and temperature effects. Interestingly, we find that an NCFET with PZT ferroelectric of a large thickness provides a negative output differential resistance in addition to an expected high ON current and a sub-60 mV/decade subthreshold swing. The model is also tested for the Gummel symmetry and its transient capabilities are highlighted through a ring oscillator circuit simulation.