High performance level restoration circuits
Three high performance level restoration circuits are proposed, which outperform the existing level restoration circuits with cross-coupled PMOS, in terms of power dissipation and delay. The first configuration employs a back-bias scheme in order to eliminate the stand-by leakage caused by the low-s...
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Published in: | Microelectronics Vol. 32; no. 12; pp. 1009 - 1016 |
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Main Authors: | , , |
Format: | Journal Article |
Language: | English |
Published: |
Elsevier Ltd
01-12-2001
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Subjects: | |
Online Access: | Get full text |
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Summary: | Three high performance level restoration circuits are proposed, which outperform the existing level restoration circuits with cross-coupled PMOS, in terms of power dissipation and delay. The first configuration employs a back-bias scheme in order to eliminate the stand-by leakage caused by the low-swing input. The second one adopts a bootstrapping technique, in order to restore the low-swing signal, without dc power consumption. Finally, a level restoration circuit is proposed, based on the generation of a narrow zero-pulse, for properly controlling the output PMOS device. The presented level restoration circuits can be implemented in standard CMOS technologies. By simulating the proposed circuits on a low-swing interconnect scheme, a 60% power savings have been observed over the conventional full-swing case. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 1879-2391 0026-2692 1879-2391 |
DOI: | 10.1016/S0026-2692(01)00091-X |