Gabor Filter Based on Stochastic Computation

• Published in: IEEE signal processing letters Vol. 22; no. 9; pp. 1224 - 1228
• Main Authors: Onizawa, Naoya, Katagiri, Daisaku, Matsumiya, Kazumichi, Gross, Warren J., Hanyu, Takahiro
• Format: Journal Article
• Language: English
• Published: IEEE 01-09-2015
• Subjects: Computers; Digital circuit implementation; Digital circuits; Educational institutions; Hardware; Input variables; Logic gates; Materials; stochastic computing
• ISSN: 1070-9908; 1558-2361
• DOI: 10.1109/LSP.2015.2392123

This letter introduces a design and proof-of-concept implementation of Gabor filters based on stochastic computation for area-efficient hardware. The Gabor filter exhibits a powerful image feature extraction capability, but it requires significant computational power. Using stochastic computation, a sine function used in the Gabor filter is approximated by exploiting several stochastic tanh functions designed based on a state machine. A stochastic Gabor filter realized using the stochastic sine shaper and a stochastic exponential function is simulated and compared with the original Gabor filter that shows almost equivalent behaviour at various frequencies and variance. A root-mean-square error of 0.043 at most is observed. In order to reduce long latency due to stochastic computation, 68 parallel stochastic Gabor filters are implemented in Silterra 0.13 μm CMOS technology. As a result, the proposed Gabor filters achieve a 78% area reduction compared with a conventional Gabor filter while maintaining the comparable speed.