TCAD Simulation Study of ESD Behavior of InGaAs/InP Heterojunction Tunnel FETs

• Published in: Crystals (Basel) Vol. 10; no. 11; p. 1059
• Main Authors: Zhu, Zhihua, Yang, Zhaonian, Zhang, Yingtao, Fan, Xiaomei, Liou, Juin Jei, Fan, Wenbing
• Format: Journal Article
• Language: English
• Published: Basel MDPI AG 01-11-2020
• Subjects: band-to-band tunneling (BTBT); CAD; Computer aided design; Electric fields; electrostatic discharge (ESD); Electrostatic discharges; Failure modes; Field effect transistors; heterojunction tunneling field effect transistor (HTFET); Heterojunctions; Indium gallium arsenides; Indium phosphides; Integrated circuits; Robustness; Semiconductor devices; Semiconductors; Simulation; Transistors; transmission line pulse (TLP); Transmission lines
• ISSN: 2073-4352; 2073-4352
• DOI: 10.3390/cryst10111059

For the first time, we investigated the electrostatic discharge (ESD) behavior of an InGaAs/InP heterojunction tunneling field effect transistor (HTFET). The device structure in this study has a high on-state current without extra process steps. Under the positive transmission line pulse (TLP) simulation, the band-to-band tunneling (BTBT) current acts as an important initial current to accelerate the occurrence of impact ionization and the device is turned on quickly. Under the negative transmission line pulse (TLP) simulation, the operating principle of the HTFET is the same as for a poly-bounded diode. The ESD robustness of the device under TLP simulation are evaluated, and the impact factors, with regard to ESD robustness and failure mode, are discussed. Finally, the device behavior under very fast transmission line pulse (VFTLP) simulations with different rise times and pulse widths is also investigated. The results show that this device may be used for the ESD protection of next-generation III–V technology.