Variable-Structure Generalized Delayed Signal Cancellation PLL to Improve Convergence Time

• Published in: IEEE transactions on industrial electronics (1982) Vol. 62; no. 11; pp. 7146 - 7150
• Main Authors: Batista, Ygo N., de Souza, Helber E. P., Neves, Francisco A. S., Dias Filho, Roberto F., Bradaschia, Fabricio
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-11-2015; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: amplitude and phase estimation; Cancellation; Convergence; Electrical engineering; Frequency estimation; Harmonic analysis; Harmonics; Industrial electronics; industrial power system harmonics; Mathematical analysis; Phase locked loops; Phase locked systems; power filters; Power system harmonics; Switches; Synchronization method; Time factors; Vectors (mathematics); phase-locked loops (PLLs); power filters; synchronization method; Amplitude and phase estimation; industrial power system harmonics
• ISSN: 0278-0046; 1557-9948
• DOI: 10.1109/TIE.2015.2443108

This paper shows a scheme for improving the detection performance of the fundamental-frequency positive-sequence (FFPS) space vector through the generalized delayed signal cancellation phase-locked loop (GDSC-PLL). We implemented a variable-structure scheme in order to reduce the convergence time by changing the traditional datapath whenever even harmonics are not present in the input signal. If this condition is not true, the performances of the variable-structure GDSC-PLL and the traditional GDSC-PLL for detecting the FFPS space vector will be similar. Therefore, the variable-structure GDSC-PLL does not require a previous knowledge about the harmonic components of the three-phase signal. Furthermore, we improved the frequency-adaptive scheme. The performances of the original and proposed schemes were compared through transient test cases based on IEC 61000 and typical electrical events. The new approach led to a reduction of up to 62% in the convergence time.