Pin-down cache: a virtual memory management technique for zero-copy communication

• Published in: Proceedings - International Parallel Processing Symposium pp. 308 - 314
• Main Authors: Tezuka, H., O'Carroll, F., Hori, A., Ishikawa, Y.
• Format: Conference Proceeding Journal Article
• Language: English
• Published: IEEE 1998
• Subjects: Access protocols; Bandwidth; Communication system control; Engines; Hardware; Kernel; Libraries; Memory management; Message passing; Operating systems
• ISBN: 0818684046; 9780818684043
• ISSN: 1063-7133
• DOI: 10.1109/IPPS.1998.669932

The overhead of copying data through the central processor by a message passing protocol limits data transfer bandwidth. If the network interface directly transfers the user's memory to the network by issuing DMA, such data copies may be eliminated. Since the DMA facility accesses the physical memory address space, user virtual memory must be pinned down to a physical memory location before the message is sent or received. If each message transfer involves pin-down and release kernel primitives, message transfer bandwidth will decrease since those primitives are quite expensive. The authors propose a zero copy message transfer with a pin-down cache technique which reuses the pinned-down area to decrease the number of calls to pin-down and release primitives. The proposed facility has been implemented in the PM low-level communication library on the RWC PC Cluster II, consisting of 64 Pentium Pro 200 MHz CPUs connected by a Myricom Myrinet network, and running NetBSD. The PM achieves 108.8 MBytes/sec for a 100% pin-down cache hit ratio and 78.7 MBytes/sec for all pin-down cache miss. The MPI library has been implemented on top of PM. According to the NAS parallel benchmarks result, an application is still better performance in case that cache miss ratio is very high.