Double-Halo Field-Effect Transistor-A Multifunction Device to Sustain the Speed and Density Rate of Modern Integrated Circuits

• Published in: IEEE transactions on electron devices Vol. 58; no. 12; pp. 4226 - 4234
• Main Authors: Marino, F. A., Meneghesso, G.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-12-2011; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Alternative complementary metal-oxide-semiconductor (CMOS) technology; Applied sciences; CMOS integrated circuits; Compound structure devices; Computer architecture; Design. Technologies. Operation analysis. Testing; DH-HEMTs; Electric, optical and optoelectronic circuits; Electronics; Exact sciences and technology; Integrated circuits; Logic gates; Microprocessors; MOS devices; MOSFET device; multifunction MOS; numerical simulation; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Theoretical study. Circuits analysis and design; Transistors; Performance evaluation; MOSFET; Multifunctionality; Prototype; Circuit simulation; Spurious capacity; MOS structure; Alternative complementary metal―oxide― semiconductor (CMOS) technology; Electrical model; MOSFET device; Field effect transistor; Semiconductor device; Complementary MOS technology; Digital integrated circuits; Integrated circuit; SPICE; Numerical simulation; Gain; multifunction MOS
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2011.2169067

In this paper, an extensive description of the main characteristics and possible applications of a double-halo metal-oxide-semiconductor (MOS) device is presented. In particular, the details concerning the prototype fabrication through a standard complementary MOS (CMOS) process and the obtained experimental results are reported. Extensive numerical device simulation has been carried out in order to deeply understand the new structure. Furthermore, to gain insight on the device behavior, an electrical model to be used in SPICE-like circuit simulation tools has been developed and verified. As shown by our analysis, digital integrated circuits employing the new technology introduce, with respect to standard CMOS ones, a drastic reduction of both the device number and the parasitic capacitances, leading to a significant improvement of the circuit performance.