A high-speed neural analog circuit for computing the bit-level transform image coding

• Published in: IEEE transactions on consumer electronics Vol. 37; no. 3; pp. 337 - 342
• Main Authors: Chang, P.R., Hwang, K.S., Gong, H.M.
• Format: Journal Article
• Language: English
• Published: IEEE 01-08-1991
• Subjects: Analog circuits; Analog computers; Discrete cosine transforms; Hopfield neural networks; Image coding; Image storage; Matrix decomposition; Neural networks; Quadratic programming; Two dimensional displays
• ISSN: 0098-3063; 1558-4127
• DOI: 10.1109/30.85534

A Hopfield-type neural network approach is presented which leads to an analog circuit for implementing the bit-level transform image. The computation of a 2D DCT (discrete cosine transform)-based transform coding is shown to solve a quadratic nonlinear programming problem subject to the corresponding 2's complement binary variables of 2D DCT coefficients. A novel Hopfield-type neural analog circuit designed to perform the DCT-based quadratic nonlinear programming could obtain the desired coefficients of an 8*8 DCT in 2's complement code within 1 ns with RC=10/sup -8/. A programmable analog MOS implementation provides a flexible architecture to realize the DCT-based neural net.< >