Decoded-source sense amplifier for high-density DRAMs

Decoded-source sense amplifier for high-density DRAMs

The decoded-source sense amplifier (DSSA) for high-speed, high-density DRAMs is discussed. To prevent clamping of the common-source node of the sense amplifier caused by bit-line discharge current, the DSSA has an additional latching transistor with a gate controlled by a column decoder. The DSSA ha...

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Bibliographic Details
Published in:IEEE journal of solid-state circuits Vol. 25; no. 1; pp. 18 - 23
Main Authors: Okamura, J.-I., Okada, Y., Koyanagi, M., Takeuchi, Y., Yamada, M., Sakurai, K., Imada, S., Saito, S.
Format: Journal Article
Language:English
Published: IEEE 01-02-1990
Subjects:
Aluminum
Capacitance
Clamps
Decision support systems
Decoding
Operational amplifiers
Random access memory
Storage area networks
Voltage
Wiring
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Summary:The decoded-source sense amplifier (DSSA) for high-speed, high-density DRAMs is discussed. To prevent clamping of the common-source node of the sense amplifier caused by bit-line discharge current, the DSSA has an additional latching transistor with a gate controlled by a column decoder. The DSSA has been successfully installed in a 4-Mb DRAM and provided a RAS access time of 60 ns under a V/sub cc/ of 4 V at 85 degrees C.< >
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9200
1558-173X
DOI:10.1109/4.50278