Asymptotic Error Probability of the Gallager B Decoder Under Timing Errors

• Published in: IEEE communications letters Vol. 21; no. 4; pp. 698 - 701
• Main Authors: Dupraz, Elsa, Declercq, David, Vasic, Bane
• Format: Journal Article
• Language: English
• Published: IEEE 01-04-2017; Institute of Electrical and Electronics Engineers
• Subjects: Clocks; computation trees; Computational modeling; Decoding; Engineering Sciences; Error probability; faulty Gallager B decoders; Information Theory; Logic gates; Low-density parity check codes; Mathematics; Parity check codes; Signal and Image processing; Timing; timing errors
• ISSN: 1089-7798; 1558-2558
• DOI: 10.1109/LCOMM.2017.2647804

In a circuit, timing errors occur when a logic gate output does not switch before the clock rising edge. In this letter, we consider Gallager B decoders under timing errors, following the error model derived by Amaricai et al. from SPICE measurements. For this model, we provide a theoretical analysis of the performance of LDPC decoders. This letter is based on the analysis of the computation trees of the decoder free of logic gate errors and of the decoder with timing errors. As a main result, we show that as the number of iterations goes to infinity, the error probability of the decoder with timing errors converges to the error probability of the logic gate error-free decoder. Monte Carlo simulations confirm this result even for moderate code lengths, which is in accordance with the experimental observations.