Design Techniques for Load-Independent Direct Bulk-Coupled Low Power QVCO

• Published in: IEEE transactions on microwave theory and techniques Vol. 61; no. 10; pp. 3658 - 3665
• Main Authors: Peng Liu, Sah, Suman P., Xinmin Yu, Jaeyoung Jung, Upadhyaya, Parag, Nguyen, Tai N., Deukhyoun Heo
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-10-2013; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Bulk-coupling; Capacitors; Circuit properties; class C; Couplings; Design. Technologies. Operation analysis. Testing; Dielectric, amorphous and glass solid devices; Electric, optical and optoelectronic circuits; Electronic circuits; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; flicker noise; Integrated circuits; load-independent VCO; Oscillators, resonators, synthetizers; Phase noise; quadrature voltage-controlled oscillator (QVCO); Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Switches; Threshold voltage; Voltage-controlled oscillators; Phase noise; Bulk-coupling; Class C; Low noise circuit; Voltage controlled oscillator; Noise reduction; Tapping; Power supply; Power electronics; 1/f noise; Quadrature modulation; load-independent VCO; Implementation; BiCMOS technology; Complementary MOS technology; Electric power consumption; Signal processing; Low-power electronics; Capacitor; flicker noise; Figure of merit; quadrature voltage-controlled oscillator (QVCO)
• ISSN: 0018-9480; 1557-9670
• DOI: 10.1109/TMTT.2013.2279778

Design techniques for a load-independent low-power low-phase-noise CMOS LC direct bulk-coupled quadrature voltage-controlled oscillator (DBC-QVCO) is presented in this paper. A capacitor tapping technique is used to lower the phase noise and achieve load-independent frequency of oscillation. Class-C operation is used to further reduce the phase noise and power consumption. Quadrature coupling is achieved using bulk coupling, leading to reduction in both power and area. The DBC-QVCO has been implemented in a standard 0.18-μm BiCMOS process and occupies an area of 0.3 mm 2 . The implemented DBC-QVCO achieves a measured phase noise of -114.2 dBc/Hz at 1-MHz offset from the 6.26-GHz carrier while consuming only 3.2 mW from a 1-V power supply. The DBC-QVCO achieves a figure of merit (FOM) of -185.1 dBc/Hz and an FOM with area of -190.3 dBc/Hz, which are among the best compared with recently published QVCOs operating in a similar frequency range.