Converter Topology for Megawatt Scale Applications With Reduced Filtering Requirements, Formed of IGBT Bridge Operating in the 1000 Hz Region With Parallel Part-Rated High-Frequency SiC MOSFET Bridge

• Published in: IEEE transactions on power electronics Vol. 39; no. 1; pp. 799 - 813
• Main Authors: Li, Ning, Macavilca, Marlee Basurto, Wu, Chenqi, Finney, Stephen, Judge, Paul D.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-01-2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Active filtering; Active filters; Bridge circuits; Controllers; depth-first search (DFS); Field programmable gate arrays; field-programmable gate array; Genetic algorithms; Harmonic distortion; Insulated gate bipolar transistors; Loss reduction; model predictive control; MOSFET; partial load efficiency; power electronic converter; Power harmonic filters; Predictive control; Semiconductor devices; Silicon; Silicon carbide; silicon carbide (SiC) <sc xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">mosfet s; Switching; Topology
• ISSN: 0885-8993; 1941-0107
• DOI: 10.1109/TPEL.2023.3323151

This article investigates the design and control of the parallel-hybrid converter (PHC), which consists of parallel connection of a silicon insulated gate bipolar transistor (IGBT) bridge and a partially rated silicon carbide (SiC) mosfet s bridge with a shared dc bus. The IGBT bridge processes the bulk of the power, while switching at a low frequency to maximize efficiency, while the SiC mosfet s bridge's lower relative switching loss is exploited to filter low-order harmonics from the IGBT bridge. A finite-set model predictive controller is detailed that allows IGBT switching frequencies down to 1 kHz to be achieved while also tightly controlling the magnitude of current in the SiC bridge. A genetic algorithm is utilized to automatically tune the control and investigate the design of the output filter as well as the influence of the controller time-step and horizon length on the performance. Power loss estimates of a 1.5 MW application case are made showing potential for significant power-loss reductions. Experimental tests validate an field-programmable gate array (FPGA) implementation of the controller and topologies performance, with IGBT bridge frequencies below 1.2 kHz and grid-current total harmonic distortion below 3% achieved. The ability of converter to switch operation between a high-current and a low-current mode and dynamic performance is also verified.