Electron-Induced Single-Event Upsets in 45-nm and 28-nm Bulk CMOS SRAM-Based FPGAs Operating at Nominal Voltage

Electron-induced single-event upsets (SEUs) are observed in 45-nm and 28-nm bulk complementary metal-oxide semiconductor static random-access memory-based field-programmable gate arrays (FPGAs) operating at nominal voltage at a 20-MeV electron LINAC facility. Upsets are recorded in the embedded rand...

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Bibliographic Details
Published in:IEEE transactions on nuclear science Vol. 62; no. 6; pp. 2717 - 2724
Main Authors: Gadlage, Matthew J., Roach, Austin H., Duncan, Adam R., Savage, Mark W., Kay, Matthew J.
Format: Journal Article
Language:English
Published: New York IEEE 01-12-2015
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
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Summary:Electron-induced single-event upsets (SEUs) are observed in 45-nm and 28-nm bulk complementary metal-oxide semiconductor static random-access memory-based field-programmable gate arrays (FPGAs) operating at nominal voltage at a 20-MeV electron LINAC facility. Upsets are recorded in the embedded random-access memory (RAM) and configuration RAM of the FPGAs. This paper is the first to show electron-induced SEUs in a commercial-off-the-shelf device operating at nominal voltage. The measured electron-induced SEU cross sections are between 10 - 18 and 10 - 17 cm 2 /bit depending on the device and memory cell tested. Monte Carlo simulations show that the upsets are due to rare indirect ionization events.
ISSN:0018-9499
1558-1578
DOI:10.1109/TNS.2015.2491220