Gate Dielectric Breakdown in A-InGaZnO Thin Film Transistors With Cu Electrodes

• Published in: IEEE electron device letters Vol. 42; no. 6; pp. 851 - 854
• Main Authors: Tai, Mao-Chou, Wang, Yu-Xuan, Chang, Ting-Chang, Huang, Hui-Chen, Lin, Chih-Chih, Huang, Bo-Shen, Chang, Han-Yu, Huang, Jen-Wei, Sze, Simon
• Format: Journal Article
• Language: English
• Published: New York IEEE 01-06-2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Amorphous InGaZnO(a-IGZO); Bias; Copper; Cu diffusion; current fitting; Current leakage; Degradation; Dielectric breakdown; Diffusion layers; Electrodes; gate dielectric breakdown; Hopping conduction; Indium gallium zinc oxide; Ions; Leakage current; Logic gates; Semiconductor devices; Stress; Thin film transistors; Thin films; Threshold voltage; Transistors
• ISSN: 0741-3106; 1558-0563
• DOI: 10.1109/LED.2021.3073138

In this work, the impact of positive bias stress (PBS) on an all copper(Cu)-electrode a-InGaZnO TFT is discussed. Commonly, Cu diffusion from the source/drain electrode after negative bias stress (NBS) leads to degradations in the on-state current and subthreshold swing. However, this study finds that diffusion in the gate insulator layer from the gate electrode suffers from more serious degradation. Eventually, this phenomenon causes a serious breakdown of the gate insulator such that it loses the transistor function. Results indicate that after 2000s of PBS, accumulation of Cu ions forms a filament which dominates the leakage path. During the stress duration, the gate leakage current is monitored and current fittings are adopted to confirm the phenomena. Furthermore, temperature dependencies have verified the results of hopping and Ohmic conduction at different stages of deterioration. Compared to previous literature that focus on the impacts of source/drain electrodes, this work suggests that gate engineering for thin film transistors is more urgent for high-quality display applications.