Block implementation of half-plane digital filters

• Published in: IEEE transactions on circuits and systems Vol. 34; no. 3; pp. 308 - 313
• Main Author: Gnanasekaran, R.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01-03-1987; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Arithmetic; Circuit properties; Circuits; Convolution; Digital filters; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Equations; Exact sciences and technology; Frequency filters; Gold; Iterative algorithms; Polynomials; Very large scale integration; Block; Digital filter; Circuit design; Recursive filter; Implementation
• ISSN: 0098-4094; 1558-1276
• DOI: 10.1109/TCS.1987.1086127

This communication deals with the derivation of a block implementation equation for asymmetric half-plane digital filters. First, a half-plane block transformation concept is developed which is essentially a matrix formulation for the computation of the products of two-sided polynomials and one-sided power series. Using this, a basic block equation is derived for the half-plane digital filters. It is also reasoned that the block computation of half-plane filters can be accomplished only in terms of blocks of samples in a row or a column, as opposed to the computation in terms of subarrays in the case of quarter-plane filters.