Hardware realization of the robust time–frequency distributions

• Published in: Annales des télécommunications Vol. 69; no. 5-6; pp. 309 - 320
• Main Authors: Žarić, Nikola, Stanković, Srdjan, Uskoković, Zdravko
• Format: Journal Article
• Language: English
• Published: Paris Springer Paris 01-06-2014
• Subjects: Circuits; Communications Engineering; Computer Communication Networks; Engineering; Information and Communication; Information Systems and Communication Service; Networks; R & D/Technology Policy; Signal,Image and Speech Processing; FPGA implementation; Bitonic sort network; Robust time–frequency distributions
• ISSN: 0003-4347; 1958-9395
• DOI: 10.1007/s12243-013-0366-7

A hardware realization of the L-estimate forms of robust time–frequency distributions is proposed. This hardware realization can be used for instantaneous frequency estimation for signals corrupted by a mixture of impulse and Gaussian noise. The most complex part in the hardware implementation is the block that performs sorting operation. In addition to the continuous realization, a recursive realization of the Bitonic sort network is proposed as well. The recursive approach also provides a fast sorting operation with a significantly reduced number of components. In order to verify the results, the FPGA implementations of the proposed systems were designed.