Photonic NoCs: System-Level Design Exploration

• Published in: IEEE MICRO Vol. 29; no. 4; pp. 74 - 85
• Main Authors: Petracca, M., Lee, B.G., Bergman, K., Carloni, L.P.
• Format: Journal Article
• Language: English
• Published: IEEE 01-07-2009
• Subjects: Budgeting; Chips; CMOS; Design engineering; Exploration; hardware; Integrated circuit interconnections; interconnection network; Multiprocessor; Network topology; Network-on-a-chip; networks-on-chip; optical interconnects; Optical modulation; Optical packet switching; Optical properties; Optical receivers; Photonics; Power dissipation; Power system interconnection; silicon photonics; Switches; System-level design
• ISSN: 0272-1732; 1937-4143
• DOI: 10.1109/MM.2009.70

Network-on-chip is a key enabling technology to address the challenges of interconnecting the increasing number of cores in emerging chip multiprocessors. By leveraging recent advances in the CMOS integration of photonic devices and the unique properties of the optical medium, photonic NoCs offer a promising solution to meet the communication requirements of chip multiprocessors with minimal draw from their power budget.