Influence of the Splicing Interface of the Mosaic Single Crystal Diamond on the H-Diamond Field-Effect Transistor Performance

• Published in: IEEE transactions on electron devices pp. 1 - 6
• Main Authors: Ding, Senchuan, Ren, Zeyang, Zhang, Jinfeng, Su, Kai, Ma, Yuanchen, Chen, Junfei, Xu, Qihui, Zhang, Jincheng, Hao, Yue
• Format: Journal Article
• Language: English
• Published: IEEE 05-02-2024
• Subjects: Diamond; Diamonds; field-effect transistor (FET); interface; Microscopy; mosaic; Optical microscopy; Performance evaluation; Splicing; Substrates; Temperature measurement
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2024.3358264

The 14-mm-large mosaic single crystal diamond (SCD) was prepared by splicing four diamond substrates with 7 mm side lengths by microwave plasma chemical vapor deposition (MPCVD). The characterization of the mosaic spliced SCD showed that even in the spliced interfaces without polycrystals or cracks, the stress, impurity, and defect density at the spliced interface were higher than those in nonspliced areas. Then, the hydrogen-terminated diamond (H-diamond)/metal-oxide semiconductor field-effect transistors (FETs) were prepared on this sample. The device characteristics were measured to study the influence of the splicing interface on device characteristics. The device made on the in-plain SCD exhibited the highest maximum saturation drain current density of <inline-formula> <tex-math notation="LaTeX">-</tex-math> </inline-formula>600.32 mA/mm and a minimum resistance of 15.2 <inline-formula> <tex-math notation="LaTeX">\Omega\cdot \text{mm}</tex-math> </inline-formula> at a <inline-formula> <tex-math notation="LaTeX">\textit{V}_{\text{GS}}</tex-math> </inline-formula> of <inline-formula> <tex-math notation="LaTeX">-</tex-math> </inline-formula>2 V; however, when the device was fabricated on the interface with significant cracks and polycrystals, the device characteristics had significant degradation. At the same time, when the splicing interface was free from polycrystals or cracks, although the device output current somehow decreased, the ON/OFF ratio and stability of the device were comparable with the device fabricated on the in-plain SCD region. We believe that the device performance can catch up with the device fabricated on the normal region in the future by optimizing the interface quality, and this kind of interface can be directly used to prepare devices.