On-chip linear voltage regulator module (VRM) effect on power distribution network (PDN) noise and jitter at high-speed output buffer
In this paper, the reduction of power distribution network noise and jitter at high-speed output buffer by using on-chip linear voltage regulator module circuit is introduced and analyzed. The transient response of typical on-chip linear VRM circuit is analyzed in power gating condition. When the on...
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Published in: | IEEE electromagnetic compatibility magazine Vol. 4; no. 2; pp. 108 - 113 |
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Main Authors: | , , , , , |
Format: | Journal Article Magazine Article |
Language: | English |
Published: |
New York
IEEE
01-01-2015
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects: | |
Online Access: | Get full text |
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