GFSPX: an efficient lightweight block cipher for resource-constrained IoT nodes

With the popularization of Internet of Things applications, trillions of new devices with different application requirements, such as smart wearables and smart home appliances, will be connected to the network. Hence, it is crucial to ensure the data transmission security of these low-power and mult...

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Bibliographic Details
Published in:The Journal of supercomputing Vol. 80; no. 17; pp. 25256 - 25282
Main Authors: Zhang, Xing, Shao, Chenyang, Li, Tianning, Yuan, Ye, Wang, Changda
Format: Journal Article
Language:English
Published: New York Springer US 01-11-2024
Springer Nature B.V
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Summary:With the popularization of Internet of Things applications, trillions of new devices with different application requirements, such as smart wearables and smart home appliances, will be connected to the network. Hence, it is crucial to ensure the data transmission security of these low-power and multifunctional sensor nodes. In this paper, a novel lightweight block cipher, GFSPX, is proposed for resource-constrained microdevices. The proposed algorithm combines a generalized Feistel structure with the substitution permutation networks structure to design the round function, which effectively addresses the inherent problem of slow diffusion in the traditional Feistel structure. Furthermore, the introduction of Addition or AND, Rotation, XOR operations in the round function to process part of the plaintext reduces the demand for hardware resource of the algorithm. The avalanche test results indicate that the GFSPX algorithm has strong diffusion and can satisfy the avalanche effect in just six rounds. The security analysis results verify the security of the GFSPX algorithm against differential and linear cryptanalysis attacks, algebraic attacks, structural attacks and key scheduling attacks. Finally, the performance analysis results indicate that the hardware implementation cost of GFSPX algorithm is relatively low, requiring only 1715 GE based on 0.13 micron logic process. In addition, the software implementation of this algorithm works well at an encryption rate of 12.31 Mb/s.
ISSN:0920-8542
1573-0484
DOI:10.1007/s11227-024-06412-2