AuRORA: A Full-Stack Solution for Scalable and Virtualized Accelerator Integration

• Published in: IEEE MICRO Vol. 44; no. 4; pp. 97 - 105
• Main Authors: Kim, Seah, Zhao, Jerry, Asanovic, Krste, Nikolic, Borivoje, Shao, Yakun Sophia
• Format: Journal Article
• Language: English
• Published: IEEE 01-07-2024
• Subjects: Encoding; Instruction sets; Ion radiation effects; Magnetosphere; Scalability; Software development management; System-on-chip; Virtualization
• ISSN: 0272-1732; 1937-4143
• DOI: 10.1109/MM.2024.3409546

To meet the increasingly demanding compute requirements of modern workloads, systems on chip (SoCs) must provide an accelerator-rich hardware architecture and software programming interface. However, scalability remains a first-order concern, as introducing additional unmanageable complexity to either physical design or software integration may prohibit the deployment of new accelerators. To address these challenges, this work presents AuRORA, an accelerator integration methodology that provides a scalable physical accelerator interface while preserving software semantics with minimal overhead for accelerator access. AuRORA provides a new accelerator integration methodology that preserves the software and hardware interface of a tightly CPU-coupled accelerator while physically disaggregating the accelerators away from a host CPU. To address software scalability, AuRORA also includes a lightweight software runtime for an SoC with heterogeneous accelerators, providing low-overhead access to these accelerators for multitenant applications.