P-168: LTPS PMOS Four-Mask Process for AMLCDs

• Published in: SID International Symposium Digest of technical papers Vol. 36; no. 1; pp. 341 - 343
• Main Authors: Park, Yong In, Lee, Dae Yoon, Yoo, Juhn S., Kang, HoChul, Lim, Kyoung Moon, Kim, Chang-Dong, Chung, In-Jae
• Format: Journal Article
• Language: English
• Published: Oxford, UK Blackwell Publishing Ltd 01-05-2005
• ISSN: 0097-966X; 2168-0159
• DOI: 10.1889/1.2036441

Simple p‐channel poly‐Si TFT (Thin Film Transistor) structure (PMOS 4mask structure) for AMLCD (active matrix liquid crystal display) was developed. Compared with a conventional PMOS 6mask process, two photo mask steps, passivation‐hole mask and pixel mask, has been eliminated to create 4mask process. Both ELA (Eximer Laser Annealing) and SLS (Sequential Lateral Solidification) method were used for the formation of a poly‐Si. By using PMOS 4mask process, 10.4‐inch XGA (1024×768) AMLCD panel with integration of the gate‐driver and demultiplexer was successfully realized.