17.2: A Novel Five-PhotoMask LTPS CMOS Structure with Improved Storage Capacitor for AMLCD Application

• Published in: SID International Symposium Digest of technical papers Vol. 41; no. 1; pp. 234 - 237
• Main Authors: Oh, Kum-Mi, Lee, Seok-Woo, Lee, Sang-Jin, Baek, Myoung-Kee, Lee, Kyung-Eon, Yang, Myoung-Su, Hwang, Yong-Kee
• Format: Journal Article
• Language: English
• Published: Oxford, UK Blackwell Publishing Ltd 01-05-2010
• ISSN: 0097-966X; 2168-0159
• DOI: 10.1889/1.3500415

A novel fivemask low temperature polycrystalline silicon LTPS complementary metal oxide semiconductor CMOS structure was verified by manufacturing the thin film transistor TFT test samples using the proposed fivemask LTPS CMOS process. In integrating the fivemask CMOS structure, a selective storage area formation process was developed, without additional photo mask steps, to solve the sputtering damage encountered inevitably in the contact between polycrystalline silicon pSi and storage metal. In addition, the selectively thin dielectric layer increased capacitance per unit area, and thus, increased the aperture ratio of AMLCD panel by reducing the capacitor area without reducing GI thickness in TFT