Design Principles of DNA-Barcodes for Nanopore-FET Readout, Based on Molecular Dynamics and TCAD Simulations

• Published in: The journal of physical chemistry. A, Molecules, spectroscopy, kinetics, environment, & general theory Vol. 128; no. 19; pp. 3926 - 3933
• Main Authors: Voorspoels, Aderik, Gevers, Juliette, Santermans, Sybren, Akkan, Nihat, Martens, Koen, Willems, Kherim, Van Dorpe, Pol, Verhulst, Anne S.
• Format: Journal Article
• Language: English
• Published: United States American Chemical Society 16-05-2024
• Subjects: A: New Tools and Methods in Experiment and Theory; DNA - chemistry; Molecular Dynamics Simulation; Nanopores; Transistors, Electronic
• ISSN: 1089-5639; 1520-5215
• DOI: 10.1021/acs.jpca.4c01772

Nanopore field-effect transistor (NP-FET) devices hold great promise as sensitive single-molecule sensors, which provide CMOS-based on-chip readout and are also highly amenable to parallelization. A plethora of applications will therefore benefit from NP-FET technology, such as large-scale molecular analysis (e.g., proteomics). Due to its potential for parallelization, the NP-FET looks particularly well-suited for the high-throughput readout of DNA-based barcodes. However, to date, no study exists that unravels the bit-rate capabilities of NP-FET devices. In this paper, we design DNA-based barcodes by labeling a piece of double-stranded DNA with dumbbell-like DNA structures. We explore the impact of both the size of the dumbbells and their spacing on achievable bit-rates. The conformational fluctuations of this DNA-origami, as observed by molecular dynamics (MD) simulation, are accounted for when selecting label sizes. An experimentally informed 3D continuum nanofluidic–nanoelectronic device model subsequently predicts both the ionic current and FET signals. We present a barcode design for a conceptually generic NP-FET, with a 14 nm diameter pore, operating in conditions corresponding to experiments. By adjusting the spacing between the labels to half the length of the pore, we show that a bit-rate of 78 kbit·s–1 is achievable. This lies well beyond the state-of-the-art of ≈40 kbit·s–1, with significant headroom for further optimizations. We also highlight the advantages of NP-FET readout based on the larger signal size and sinusoidal signal shape.