Force-directed scheduling in automatic data path synthesis
The HAL system performs data path synthesis using a new scheduling algorithm that is part of an interdependent scheduling and allocation scheme. This scheme uses an estimate of the hardware allocation to guide and optimize the scheduling subtask. The allocation information includes the number, type,...
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Published in: | 24th ACM/IEEE Design Automation Conference pp. 195 - 202 |
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Main Authors: | , |
Format: | Conference Proceeding |
Language: | English |
Published: |
New York, NY, USA
ACM
01-10-1987
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Series: | ACM Conferences |
Subjects: |
Hardware
> Electronic design automation
> High-level and register-transfer level synthesis
> Datapath optimization
Theory of computation
> Design and analysis of algorithms
> Approximation algorithms analysis
> Scheduling algorithms
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Online Access: | Get full text |
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Summary: | The HAL system performs data path synthesis using a new scheduling algorithm that is part of an interdependent scheduling and allocation scheme. This scheme uses an estimate of the hardware allocation to guide and optimize the scheduling subtask. The allocation information includes the number, type, speed and cost of hardware modules as well as the associated multiplexer and interconnect costs.
The iterative force-directed scheduling algorithm attempts to balance the distribution of operations that make use of the same hardware resources: Every feasible control step assignment is evaluated at each iteration, for all operations. The associated side-effects on all the predecessor and successor operations are taken into account. All the decisions are global. The algorithm has O(n8 complexity.
We review and compare existing scheduling techniques. Moderate and difficult examples are used to illustrate the effectiveness of the approach. |
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ISBN: | 9780818607813 0818607815 |
ISSN: | 0738-100X |
DOI: | 10.1145/37888.37918 |