3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE

In recent years, the demand for low cost and system-on-a-chip for mobile terminals has led to the development of a highly-integrated, low-distortion, and high-power-efficiency CMOS power amplifier (PA). To improve the power efficiency of the conventional linear PA [1-4], an envelope tracking (ET) te...

Full description

Saved in:
Bibliographic Details
Published in:2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) pp. 60 - 61
Main Authors: Oishi, Kazuaki, Yoshida, Eiji, Sakai, Yasufumi, Takauchi, Hideki, Kawano, Yoichi, Shirai, Noriaki, Kano, Hideki, Kudo, Masahiro, Murakami, Tomotoshi, Tamura, Tetsuro, Kawai, Shigeaki, Yamaura, Shinji, Suto, Kazuo, Yamazaki, Hiroshi, Mori, Toshihiko
Format: Conference Proceeding
Language:English
Published: IEEE 01-02-2014
Subjects:
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Abstract In recent years, the demand for low cost and system-on-a-chip for mobile terminals has led to the development of a highly-integrated, low-distortion, and high-power-efficiency CMOS power amplifier (PA). To improve the power efficiency of the conventional linear PA [1-4], an envelope tracking (ET) technique, which modulates supply voltage of a linear PA, has attracted attention. However, the published power efficiency, gain and output power are not sufficient for LTE applications [5], and its typical implementation requires an external supply modulator that is a high-speed power supply circuit [6]. Envelope elimination and restoration (EER) is an alternative supply modulation technique that can further improve the power efficiency over ET by replacing the linear PA with a switching PA driven by a phase signal [7]. However, to meet the specified low distortion, especially for LTE with a wide bandwidth baseband signal, an EER PA generally has difficulty achieving a wide bandwidth for the phase signal path, and requires a high-speed supply modulator, and highly accurate timing between envelope and phase signals. To overcome these problems, this paper introduces an envelope / phase generator based on a mixer and a timing aligner based on a delay-locked loop. Additionally, they were integrated with a switching PA and a supply modulator on the same die.
AbstractList In recent years, the demand for low cost and system-on-a-chip for mobile terminals has led to the development of a highly-integrated, low-distortion, and high-power-efficiency CMOS power amplifier (PA). To improve the power efficiency of the conventional linear PA [1-4], an envelope tracking (ET) technique, which modulates supply voltage of a linear PA, has attracted attention. However, the published power efficiency, gain and output power are not sufficient for LTE applications [5], and its typical implementation requires an external supply modulator that is a high-speed power supply circuit [6]. Envelope elimination and restoration (EER) is an alternative supply modulation technique that can further improve the power efficiency over ET by replacing the linear PA with a switching PA driven by a phase signal [7]. However, to meet the specified low distortion, especially for LTE with a wide bandwidth baseband signal, an EER PA generally has difficulty achieving a wide bandwidth for the phase signal path, and requires a high-speed supply modulator, and highly accurate timing between envelope and phase signals. To overcome these problems, this paper introduces an envelope / phase generator based on a mixer and a timing aligner based on a delay-locked loop. Additionally, they were integrated with a switching PA and a supply modulator on the same die.
Author Shirai, Noriaki
Murakami, Tomotoshi
Yamaura, Shinji
Yoshida, Eiji
Sakai, Yasufumi
Yamazaki, Hiroshi
Oishi, Kazuaki
Takauchi, Hideki
Kano, Hideki
Kudo, Masahiro
Suto, Kazuo
Kawano, Yoichi
Tamura, Tetsuro
Mori, Toshihiko
Kawai, Shigeaki
Author_xml – sequence: 1
  givenname: Kazuaki
  surname: Oishi
  fullname: Oishi, Kazuaki
  organization: Fujitsu Labs., Kawasaki, Japan
– sequence: 2
  givenname: Eiji
  surname: Yoshida
  fullname: Yoshida, Eiji
  organization: Fujitsu Labs., Kawasaki, Japan
– sequence: 3
  givenname: Yasufumi
  surname: Sakai
  fullname: Sakai, Yasufumi
  organization: Fujitsu Labs., Kawasaki, Japan
– sequence: 4
  givenname: Hideki
  surname: Takauchi
  fullname: Takauchi, Hideki
  organization: Fujitsu Labs., Kawasaki, Japan
– sequence: 5
  givenname: Yoichi
  surname: Kawano
  fullname: Kawano, Yoichi
  organization: Fujitsu Labs., Kawasaki, Japan
– sequence: 6
  givenname: Noriaki
  surname: Shirai
  fullname: Shirai, Noriaki
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 7
  givenname: Hideki
  surname: Kano
  fullname: Kano, Hideki
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 8
  givenname: Masahiro
  surname: Kudo
  fullname: Kudo, Masahiro
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 9
  givenname: Tomotoshi
  surname: Murakami
  fullname: Murakami, Tomotoshi
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 10
  givenname: Tetsuro
  surname: Tamura
  fullname: Tamura, Tetsuro
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 11
  givenname: Shigeaki
  surname: Kawai
  fullname: Kawai, Shigeaki
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 12
  givenname: Shinji
  surname: Yamaura
  fullname: Yamaura, Shinji
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 13
  givenname: Kazuo
  surname: Suto
  fullname: Suto, Kazuo
  organization: Fujitsu Semicond., Yokohama, Japan
– sequence: 14
  givenname: Hiroshi
  surname: Yamazaki
  fullname: Yamazaki, Hiroshi
  organization: Fujitsu Labs., Kawasaki, Japan
– sequence: 15
  givenname: Toshihiko
  surname: Mori
  fullname: Mori, Toshihiko
  organization: Fujitsu Labs., Kawasaki, Japan
BookMark eNp9kMFOwzAQRA0UiQT6A3DZH0hqx40dH6tQKBIVh1TiWFnqJjVynMgJVOVX-FlCiThymp15mjlsSCaucUjILaMxY1TNnooiz-OEsnksZCo5l2dkqmTG5lIpqhKqzkmQcCmiTFBxQcIRsIxNSECZ4pFIOb0iYde9UUpTJbKAfPE4gQWwWKWPq08o3609gnE9Vl73uAN0H2ibFgGtqY3TvWkcaLcDj13f-F-fr18KaJsDetB1a01phutg-v1ffdbudYdQocOh0_jTRP-zWIG2phpiKIf4Nb9fL07webO8IZelth1OR70mdw_LTb6KDCJuW29q7Y_b8Rn8f_oNzzFgVg
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1109/ISSCC.2014.6757337
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library Online
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library Online
  url: http://ieeexplore.ieee.org/Xplore/DynWel.jsp
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISBN 9781479909209
1479909203
EISSN 2376-8606
EndPage 61
ExternalDocumentID 6757337
Genre orig-research
GroupedDBID 29G
6IE
6IF
6IH
6IK
6IL
6IM
6IN
AAJGR
ABLEC
ACGFS
ADZIZ
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
IEGSK
IJVOP
IPLJI
JC5
M43
OCL
RIE
RIG
RIL
RIO
RNS
ID FETCH-ieee_primary_67573373
IEDL.DBID RIE
ISBN 1479909181
9781479909186
ISSN 0193-6530
IngestDate Wed Jun 26 19:28:57 EDT 2024
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-ieee_primary_67573373
ParticipantIDs ieee_primary_6757337
PublicationCentury 2000
PublicationDate 2014-Feb.
PublicationDateYYYYMMDD 2014-02-01
PublicationDate_xml – month: 02
  year: 2014
  text: 2014-Feb.
PublicationDecade 2010
PublicationTitle 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
PublicationTitleAbbrev ISSCC
PublicationYear 2014
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0005968
ssj0002672535
Score 3.8249068
Snippet In recent years, the demand for low cost and system-on-a-chip for mobile terminals has led to the development of a highly-integrated, low-distortion, and...
SourceID ieee
SourceType Publisher
StartPage 60
SubjectTerms Bandwidth
CMOS integrated circuits
Delays
Multiaccess communication
Power amplifiers
Spread spectrum communication
Title 3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE
URI https://ieeexplore.ieee.org/document/6757337
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://sdu.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3PT8IwFH4RTnrxBxgVNe_g0Y26rut2JAPERNRkJHojte3wYAZBOOi_4j9r28HQhIu3tkvf1nTbe_v2vu8BXBGeS8GY9EiuQs_Et7EXS6k9HgoiXwPTVBYaGGT84SXu9qxMznXFhdFau-Qz7dum-5evpnJpobK2CW45pbwGNZ7EJVerwlOCiAeMbkJfljganIlgqBcxShypi5t3b2J82lrradWP1mwakrTvsixNbcpX6K9O96fuinM7_f3_XfABNDf8PXyqPNMh7OjiCPZ-SQ824Jv6AXbwxk_Y7eALLQr_iZV2hEJduGQijfrd1f2y-4eiUDh3pWjKfjp8zHBm66yhsJnpufGxaJHdanp79mbcJE6cuLWZ50wsrMUJmi-AiRlGEzbjc9oddtzB-1GvCa1-b5QOPLvU8azUwxivVkmPoV5MC30CKIJI5xFVoQxFSFQk7LOeE6FjppiO-Sk0tlk42z7cgl27H2Wu9DnUF_OlvoDah1peunvgByLLsJY
link.rule.ids 310,311,782,786,791,792,798,27934,54767
linkProvider IEEE
linkToHtml http://sdu.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3PT8IwFH4RPKgXf4BR8cc7eHRjruu6HckARwQ0GYneSF07PJhBEA76r_jP2nY4NOHire3StzXd9t6-ve97ANcOy1JOaWo5mfAsFd8GVpCm0mIed9IXVzWFhgbihA2fg3ZHy-TclFwYKaVJPpO2bpp_-WKaLjVU1lTBLSOEVWCbesxnBVurRFRcn7mUrINfGhoinIphiOVT4hhaF1Nv31B5tR-1p1Xf_-HTOGGzlyRRpJO-PHt1wj-VV4zj6e7_75IPoL5m8OFj6ZsOYUvmR7D3S3ywBl_EdrGFt3ZI7-JP1Dj8B5bqEQJlbtKJJMo3U_lL7yDyXODcFKMp-tHgIcGZrrSGXOemZ8rLosZ2y-nN2atylDgx8tZqnjGx0BYnqL4BJmoYVeCMT1F70DIH-6NOHRrdziiKLb3U8axQxBivVkmOoZpPc3kCyF1fZj4RXupxzxE-10975nAZUEFlwE6htsnC2ebhK9iJR4P-uN8b3jdgV-9NkTl9DtXFfCkvoPIulpfmfvgGnVCz5w
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2014+IEEE+International+Solid-State+Circuits+Conference+Digest+of+Technical+Papers+%28ISSCC%29&rft.atitle=3.2+A+1.95GHz+fully+integrated+envelope+elimination+and+restoration+CMOS+power+amplifier+with+envelope%2Fphase+generator+and+timing+aligner+for+WCDMA+and+LTE&rft.au=Oishi%2C+Kazuaki&rft.au=Yoshida%2C+Eiji&rft.au=Sakai%2C+Yasufumi&rft.au=Takauchi%2C+Hideki&rft.date=2014-02-01&rft.pub=IEEE&rft.isbn=1479909181&rft.issn=0193-6530&rft.eissn=2376-8606&rft.spage=60&rft.epage=61&rft_id=info:doi/10.1109%2FISSCC.2014.6757337&rft.externalDocID=6757337
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=0193-6530&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=0193-6530&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=0193-6530&client=summon