'trimoda' Wafer-Level Package: Fully Compatible Electrical, Optical, and Fluidic Chip I/O Interconnects

• Published in: 2007 Proceedings 57th Electronic Components and Technology Conference pp. 585 - 592
• Main Authors: Bakir, M.S., Bing Dang, Ogunsola, O.O., Meindl, J.D.
• Format: Conference Proceeding
• Language: English
• Published: IEEE 01-05-2007
• Subjects: Assembly; Electric variables measurement; Electrical resistance measurement; Optical attenuators; Optical interconnections; Packaging; Semiconductor device measurement; Testing; Wafer scale integration; Wavelength measurement
• ISBN: 9781424409846; 1424409845
• ISSN: 0569-5503; 2377-5726
• DOI: 10.1109/ECTC.2007.373855

We describe the fabrication, assembly, and testing of a wafer-level package with fully compatible electrical, optical, and fluidic ('trimoda') chip I/O interconnects. Various trimodal interconnect configurations are introduced. The trimodal I/Os are fabricated using five minimally demanding masking steps. In order to experimentally characterize the trimodal I/Os, we fabricate two separate substrates to test the chips with these I/Os in a piecewise manner. In the first assembly demonstration, we perform electrical and optical I/O interconnection measurements. In the second assembly demonstration, we perform electrical and fluidic interconnection measurements. Measurements reveal that the metal-clad optical pins (55×110 μm in size) attenuate an optical signal (632.8 nm wavelength) by 3.6%. The electrical resistance is measured to be 50 mΩ. It is also shown that the fluidic I/Os with the integrated back-side thermofluidic microchannel heat sink can achieve thermal resistance as low as 0.17°C-cm 2 /W. Cooling of localized power density of >300 W/cm 2 is also demonstrated. Mechanical testing of polymer pins before and after metallization is also reported.