Three-dimensional 35 nF/mm/sup 2/ MIM capacitors integrated in BiCMOS technology

Decoupling applications require high capacitance values. To optimize the chip performances, it appears particularly interesting to integrate them directly in interconnect levels, especially in BiCMOS technology. In order to reach this goal and minimize the area occupied by such devices, three-dimens...

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Bibliographic Details

Published in:	Proceedings of 35th European Solid-State Device Research Conference, 2005. ESSDERC 2005 pp. 121 - 124
Main Authors:	Bajolet, A., Giraudin, J.C., Rossato, C., Pinzelli, L., Bruyere, S., Cremer, S., Jagueneau, T., Delpech, P., Montes, L., Ghibaudo, G.
Format:	Conference Proceeding
Language:	English
Published:	IEEE 2005
Subjects:	BiCMOS integrated circuits Capacitance High K dielectric materials Integrated circuit interconnections Metal-insulator structures Microelectronics MIM capacitors MOCVD Noise measurement Scanning electron microscopy
Online Access:	Get full text
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