Efficient Reversible Logic Design for Quantum Computing: A Novel 4-Bit LFSR Approach

• Published in: Proceedings (IEEE Region 10 Symposium. Online) pp. 1 - 6
• Main Authors: Neelima, N., Rao, K. Nishanth, Kumar, Aruru Sai, Komanduri, Jayaram, Kemmasaram, Suresh, Adepu, Sangeetha Laxmi
• Format: Conference Proceeding
• Language: English
• Published: IEEE 27-09-2024
• Subjects: Ancilla Inputs; Costs; Energy dissipation; Flip-flops; Garbage outputs; IEEE Regions; Linear Feedback Shift Register (LFSR); Linear feedback shift registers; Logic; Logic design; Logic gates; Low power; Quantum computing; Reversible computing; Reversible logic
• ISSN: 2642-6102
• DOI: 10.1109/TENSYMP61132.2024.10752203

Reversible logic gates are critical components in the field of quantum computing and low-power digital circuits, as they allow for the retrieval of input states from output states without any loss of information. This property ensures minimal energy dissipation, aligning with the principles of reversible computation. Their applications extend to quantum computing, cryptographic systems, and error detection and correction mechanisms. This paper presents a novel design for a Reversible D Flip-Flop (RDFF) and a 4-bit Linear Feedback Shift Register (LFSR). The Linear Feedback Shift Register (LFSR) is built utilizing four Register-Driven D Flip-Flops (RDFFs) and a feedback mechanism that incorporates a Feynman Gate. This configuration successfully showcases the capacity to generate pseudo-random sequences. The LFSR design demonstrates a 10% improvement in Total Reversible Logic Implementation Cost and 27% enhancement in quantum cost, making it a more resource-efficient option for reversible computing. This work makes a valuable contribution to the field of reversible computing by offering efficient designs for essential components.