Effect of Halo structure variations on the threshold voltage of a 22 nm gate length NMOS transistor

• Published in: Materials science in semiconductor processing Vol. 17; pp. 155 - 161
• Main Authors: AFIFAH MAHERAN, A. H, MENON, P. S, AHMAD, I, SHAARI, S
• Format: Journal Article
• Language: English
• Published: Kidlington Elsevier 2014
• Subjects: Applied sciences; Compound structure devices; Condensed matter: electronic structure, electrical, magnetic, and optical properties; Design. Technologies. Operation analysis. Testing; Devices; Electronic structure and electrical properties of surfaces, interfaces, thin films and low-dimensional structures; Electronic transport in interface structures; Electronics; Exact sciences and technology; Gates; Halos; Implantation; Integrated circuits; Metal-insulator-semiconductor structures (including semiconductor-to-insulator); Physics; Process parameters; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Semiconductors; Threshold voltage; Transistors; Variance; Voltage threshold; NMOS; Variable parameter circuit; Planar transistor; Optimization; Variance; Complementary MOS technology; Compensation; Tungsten; MOS transistor; High-k/metal gate; Taguchi method; Semiconductor materials; MOS structure; Implantation; 22 nm Gate length; Drain; Mean value; Array; Tilt angle; Silicon oxides; Experimental design; Physical parameter; Silvaco; Variable parameter; High k dielectric; Planar device; Titanium oxide; NMOS technology; Signal to noise ratio
• ISSN: 1369-8001; 1873-4081
• DOI: 10.1016/j.mssp.2013.09.009

This paper reports on the effects of the Halo structure variations on threshold voltage (Vth) in a 22 nm gate length high-k/metal gate planar NMOS transistor. Since the Vth is one of the important physical parameter for determining the functionality of complementary metal-oxide-semiconductor device, this experiment will focus on finding the best combination on process parameter to achieve the best value of Vth. The Halo structure variable process parameters are the Halo implantation dose, the Halo implantation tilting angle, the Source/Drain implantation dose and the compensation implantation dose. The design of the planar device consists of a combination of high permittivity material (high-k) and a metal gate. Titanium dioxide was used as the high-k material instead of the traditional SiO2 dielectric and tungsten silicide was used as the metal gate. The optimization process was executed using Taguchi's L9 array to obtain a robust design. Taguchi's Nominal-the-Best signal-to-noise ratio was used in an effort to minimize the variance of Vth. The results show that the Vth values have least variance and the mean value can be adjusted to 0.289 V plus or minus 12.7% which is in line with projections made by the International Technology Roadmap for Semiconductors.