Optimized NH3 annealing Process for high-quality HfSiON gate oxide
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Published in: | IEEE electron device letters Vol. 25; no. 7; p. 465 |
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Main Authors: | , , , , , , , , |
Format: | Journal Article |
Language: | English |
Published: |
New York
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
01-07-2004
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Author | Cho, H.-J Kang, C.Y Kim, Y.H Choi, C.H Rhee, S.J Akbar, M.S Choi, R Lee, J.C Kang, C.S |
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Author_xml | – sequence: 1 givenname: M.S surname: Akbar fullname: Akbar, M.S – sequence: 2 givenname: H.-J surname: Cho fullname: Cho, H.-J – sequence: 3 givenname: R surname: Choi fullname: Choi, R – sequence: 4 givenname: C.S surname: Kang fullname: Kang, C.S – sequence: 5 givenname: C.Y surname: Kang fullname: Kang, C.Y – sequence: 6 givenname: C.H surname: Choi fullname: Choi, C.H – sequence: 7 givenname: S.J surname: Rhee fullname: Rhee, S.J – sequence: 8 givenname: Y.H surname: Kim fullname: Kim, Y.H – sequence: 9 givenname: J.C surname: Lee fullname: Lee, J.C |
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Title | Optimized NH3 annealing Process for high-quality HfSiON gate oxide |
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